Compound semiconductor device

Abstract

PURPOSE:To prevent the variation of pinch-off voltage caused by an usual heat treatment in manufacturing process by forming a gate electrode out of two layers in which high-melting-point metal is used for the first layer of the substrate side and aluminum is used for the second layer. CONSTITUTION:On a semiconductor substrate 11, a source electrode 14, a drain electrode 15 and a gate electrode 16 using Schottky barrier are arranged to form a Schottky barrier FET. The gate electrode 16 is formed out of two layers and for the first layer 161 on the substrate side, the high-melting-point metal using at least one selected out of molybdenum (Mo), tungsten (W), tantalum (Ta), niobium (Nb), hafnium (Hf), chromium (Cr) and titanium (Ti) is used, and for the second layer 162 on another side, aluminum is used. Consequently, a position of the Schottky barrier is fixed in the position when forming gate electrodes and is not moved by the heat treatment during the following manufacturing process thereby preventing variation of pinch-off voltage.

Claims

Description

Topics

Download Full PDF Version (Non-Commercial Use)

Patent Citations (0)

    Publication numberPublication dateAssigneeTitle

NO-Patent Citations (0)

    Title

Cited By (5)

    Publication numberPublication dateAssigneeTitle
    DE-102007042950-A1January 15, 2009Qimonda AgIntegrierte Schaltungsvorrichtung mit einer Gateelektrodenstruktur und ein entsprechendes Verfahren zur Herstellung
    DE-102007042950-B4July 11, 2013Qimonda AgIntegrierte Schaltung mit einer Gateelektrodenstruktur und ein entsprechendes Verfahren zur Herstellung
    JP-S6081859-AMay 09, 1985Matsushita Electric Ind Co LtdSchottky barrier semiconductor device
    US-5153754-AOctober 06, 1992General Electric CompanyMulti-layer address lines for amorphous silicon liquid crystal display devices
    US-7317206-B2January 08, 2008Samsung Sdi Co., Ltd.Conductive elements for thin film transistors used in a flat panel display